AMD has already received the first working 2nm Zen 6 chips, with months to go before commercial launch

While Intel continues to struggle and postpone the release of new Xeons, AMD has unexpectedly announced that it has already received the first working crystals manufactured on a 2nm process. We are talking about the CCD (core) for the next generation of EPYC Venice processors based on Zen 6 architecture.

Here's What We Know

AMD has confirmed that the chips have successfully passed the initial testing and power supply, i.e. they are "up and running". They are manufactured at the TSMC fab using the new N2 process, which uses Gate-All-Around (GAA) transistors, the next step after FinFET.

According to TSMC, the new process can either reduce power consumption by 24-35% or increase performance by 15% with the same power consumption. It also allows for more transistors to be placed on the same area (plus 15% density compared to the 3 nm generation).

Venice processors will be available in 2026 and will be part of the 6th generation of EPYC. In addition, AMD confirmed that it has already tested 5th generation EPYC chips manufactured at TSMC's new Fab 21 fab in Arizona, which means that the company is seriously diversifying its production capacity, which is good news amid global supply chain turbulence.

AMD CEO Lisa Su called this release an example of deep cooperation with TSMC and the next step in the development of high-performance computing.

Zen 6 is AMD's future processor architecture that will continue the development of the Zen line. It is expected to bring further latency reduction, improved memory performance and core scaling. According to unofficial reports, Zen 6 will use a new cache topology and an updated FP-block microarchitecture.

TSMC N2 is an advanced 2 nm process that uses GAA (Gate-All-Around) transistors for the first time. This allows for lower current leakage, higher frequencies, and lower power consumption.